python-myhdl-0.11-31.fc45.src.rpm

python-myhdl is a Python hardware description and verification language that helps you go from Python to silicon. MyHDL code can be converted to Verilog and VHDL. It can also be used to convert signals, do co-simulation with Verilog, generating test benches with test vectors for VHDL, Verilog and supports viewing waveform by tracing signal changes in a VCD file.